Subsystem Test and Integration

During the Subsystem Test and Integration phase, maturing elements of the hardware and software are brought together and exercised, with corrections processed as needed. These tests are conducted in accordance with their respective test plans and may be conducted iteratively and/or in parallel as appropriate.

Inputs

1. 1. Output from the prior phases, as well as engineering work products that have completed verification at the prior level during this phase.
2. 2. Verification plans that identify verifications to be bought off at this level.
3. 3. Labs and simulations that provide models of sending and receiving equipment as needed for testing at this level.
4. 4. Inspection and demonstration procedures, data, and evaluation/acceptance criteria.

Process

Integration and verification as previously described continue up to and beyond complete hardware and software end items. Subsystem Test and Integration is a risk reduction effort, to commence evaluation of those requirements that span multiple end items. For example, Compatibility & Integration (C&I) testing may be conducted in labs so that interfacing CSCIs can clearly communicate over their interfaces (e.g., message formats, timing, and protocols work across the testing group). Hardware items may be physically integrated (e.g., boards and chassis are assembled) to similarly assure physical compatibility and that power, signals, etc., are being communicated across the physical interfaces. Software may be installed and tested on the target hardware (or a functional equivalent) for the first time.

Selected requirements that cannot be effectively verified at the level of a given end item (e.g., “black box” testing), such as a Kalman filter or signal conditioner, may be formally verified and bought off at this level.

Test procedures and supporting data for formal verification of the requirements in the hardware and software end item specifications are prepared, put through a dry run, modified as necessary, and brought under configuration control.

SE works jointly with the Integrated Product Teams (IPTs) responsible for the end items to assure that the test procedures are complete. SE also continues monitoring of anomaly processing and proposed changes to assure that the system level requirements are achievable.

Outputs

1. 1. Hardware and software end items that are ready for formal qualification testing (software) and design/requirements acceptance testing (hardware).
2. 2. Internally approved software test descriptions, including detailed procedures.
3. 3. Internally approved hardware acceptance test procedures, including detailed procedures.
4. 4. Results of qualification test dry runs.
5. 5. Aircraft mod kits.
6. 6. Test planes (T − 1 through T − X) packages; X = number of Flight Test Aircrafts.
7. 7. Acceptance Test results for the hardware and software test environments that assert the readiness of those environments for use in formal testing; this includes configuration control of the test environments and assurance that the environments are operational.

Milestone Reviews

Software Test Readiness Reviews (TRRs) are conducted to assure that all the necessary conditions for commencing Formal Qualification Test (FQT) of the software have been satisfied. In accordance with program plans, similar TRRs may be conducted on hardware end items.